whitequark[cis] changed the topic of #glasgow to: https://glasgow-embedded.org · digital interface explorer · https://www.crowdsupply.com/1bitsquared/glasgow · code https://github.com/GlasgowEmbedded/glasgow · logs https://libera.catirclogs.org/glasgow · matrix #glasgow-interface-explorer:matrix.org · discord https://1bitsquared.com/pages/chat
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<_whitenotifier-e> [glasgow] whitequark synchronize pull request #1181: [WIP] Redesign/reimplement firmware and add revD support - https://github.com/GlasgowEmbedded/glasgow/pull/1181
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<_whitenotifier-e> [glasgow] pre-commit-ci[bot] created branch pre-commit-ci-update-config - https://github.com/GlasgowEmbedded/glasgow
<_whitenotifier-e> [GlasgowEmbedded/glasgow] pre-commit-ci[bot] pushed 1 commit to pre-commit-ci-update-config [+0/-0/±1] https://github.com/GlasgowEmbedded/glasgow/commit/ce51998d3b59
<_whitenotifier-e> [GlasgowEmbedded/glasgow] pre-commit-ci[bot] ce51998 - [pre-commit.ci] pre-commit autoupdate
<_whitenotifier-e> [glasgow] pre-commit-ci[bot] opened pull request #1186: [pre-commit.ci] pre-commit autoupdate - https://github.com/GlasgowEmbedded/glasgow/pull/1186
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<ldcd0[m]> Is there any desire to support the fx2 (non clone) on rev D
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<whitequark> ldcd0[m]: the clone is (afaik) a total drop-in replacement
<whitequark> the only thing that differs is the bus timings
<whitequark> and ECP5 has enough clock primitives that we should be able to fix it if need arises
<whitequark> so if you make your own revD with the non-corebai chip and it doesn't work lmk
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<_whitenotifier-e> [glasgow] whitequark synchronize pull request #1181: [WIP] Redesign/reimplement firmware and add revD support - https://github.com/GlasgowEmbedded/glasgow/pull/1181
<_whitenotifier-e> [glasgow] ld-cd reviewed pull request #1181 commit - https://github.com/GlasgowEmbedded/glasgow/pull/1181#discussion_r3489843768
<_whitenotifier-e> [glasgow] ld-cd reviewed pull request #1181 commit - https://github.com/GlasgowEmbedded/glasgow/pull/1181#discussion_r3489871140
<ldcd> afaik that feature isn't excercised in revABC and seems a likely spot for timings to be different
<ldcd> but also i have no plans on sending cypress money for an FX2 so not attempting to support the non clone on revd feels like a sensible call
<whitequark> it is not exercised in revABC, but configuring the GPIF peripheral doesn't break anything
<ldcd> oh yeah
<whitequark> WAVEDATA is just RAM
<whitequark> and EP2GPIFFLGSEL doesn't do anything unless you start a GPIF transaction
<whitequark> i also tested things on revABC
<ldcd> thats not my concern there, just that if someone did put an FX2 on a revd it might not work as is
<whitequark> we are going to try that
<ldcd> ah ok
<ldcd> sg
<whitequark> the GPIF configuration interface should be OK, i think
<whitequark> but you are right
<whitequark> may have to add wait stats
<whitequark> *states
<whitequark> which is thankfully very easy with GPIF
<ldcd> yeah
<ldcd> it seems like the corebai chip is probably on a newer process
<whitequark> yes
<ldcd> and therefore probably has less cursed shit going on
<whitequark> significantly more modern
<whitequark> i'd guess 40nm because 3V3-native
<whitequark> maybe 65?
<whitequark> hard to see it being 22
<ldcd> 65-40 sounds reasonable
<whitequark> should get one to Andrew to decap
<whitequark> actually, one thing i was gonna make is some HF
<ldcd> i can also do that
<whitequark> should be easy: get some fluorite, boil down some H2SO4, a+b=hf
<ldcd> you don't need HF in your life
<whitequark> i used to have HF in my life
<ldcd> was your life better then?
<whitequark> then i moved to the UK and for obvious reasons did not bring it with me
<whitequark> hahaha, touché
<whitequark> it was really not
<ldcd> i'll grab one next time i make an LCSC order
<ldcd> which might be a while
<whitequark> thank you
<whitequark> i have two loose ones here
<whitequark> i can just send you an envelope
<ldcd> sg
<ldcd> QFN or BGA?
<whitequark> QFN
<ldcd> nice
<whitequark> don't think the FX2 ever came in BGA
<ldcd> ok that should be straightforward
<whitequark> you got a choice of QFN and incredibly massive QFP with like 120 pins
<ldcd> i thought i saw a BGA on the corebai chip?
<whitequark> hm
<whitequark> oh maybe corebai did that
<whitequark> we're using the fully FX2-compatible package
<whitequark> QFN56
<whitequark> i'm very impressed with corebai because as best as i'm able to test this is a complete and indistinguishable functional replacement in terms of logic behavior
<ldcd> yeah looks like they did
<whitequark> glasgow exercises quite a few features of the chip too
<ldcd> i mean idk if it is actually produced
<whitequark> i was worried the GPIF would be broken somehow. nope, works
<ldcd> yeah its quite impressive
<ldcd> thats part of why i want to decap
<whitequark> it's also way cheaper which makes it more impressive
<whitequark> clearly quite a bit of R&D went into it
<ldcd> i'm also wondering if some stuff is microcoded so they could fix stuff with a patch or metalspin
<whitequark> and it can't be a high volume product from the mail we exchanged earlier
<whitequark> i'm wondering what the bonus RAM does
<ldcd> yeah
<ldcd> poke it and see if any peripheral shits the bed
<whitequark> lemme read it a few times in a row at first
<ldcd> has the old FX2 been decaped before?
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<duskwuff0[m]> you can still get cheap "develope board" [sic] for the FX2 pretty easily on eBay et al
<duskwuff0[m]> they're easiest to find by searching by the part number, CY7C68013A
<ldcd> looks like yes
<ldcd> i just wish there was something like it but with a normal cortex-m for a normal price
<ldcd> oh this is pretty old fashioned
<whitequark> very
<whitequark> ldcd: there's FX2G3
<whitequark> the "generation" situation infineon has is absolutely unhinged and i don't want to go into it
<whitequark> but basically FX2G3 and FX3G2 have the same (reasonable) core situation as FX5
<whitequark> it's a Cortex-M... I think M0+M3 or something like that
<whitequark> M4F+M0, close enough
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<whitequark> i don't love this
<whitequark> well, they do get some points for not calling this abomination a "dual row QFN" when it's clearly an LGA
<whitequark> but unfortunately you still have to deal with it
<whitequark> if it was in BGA it would be the perfect chip
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<whitequark> although, given the BGA substrate resin shortages... maybe they've made a good bet here
<whitequark> ldcd: you may have missed a few messages
<ldcd> yeah ran out to the car
<ldcd> last i checked the 2G3 didn't satisfy the reasonable price part
<ldcd> ok
<ldcd> not as bad as i remembered
<ldcd> in my head it was like 24$ single unit
<ldcd> its just like
<ldcd> an FX5 with the not USB bits "chopped" off
<ldcd> *not USB2
<ldcd> ok yeah its the FX5 that goes for 24$
<whitequark> i'm not sure if it's the same die or not
<whitequark> the FX2G2 was the same die as FX3G1 i'm pretty sure
<whitequark> which made it way too expensive
<ldcd0[m]> 14$ sounds about right if its on like 65 or 40
<ldcd0[m]> I would check but it's also just too expensive to be worth it because I won't use them anyways and fiberglass is annoying
<whitequark> for which? FX2G3?
<whitequark> okay yeah i see
<ldcd0[m]> Well the fx5
<ldcd0[m]> I'd have to get both and decap
<ldcd0[m]> Well I guess not
<ldcd0[m]> A 3 phy that isn't bonded should be pretty obv
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<whitequark> yeah
<_whitenotifier-e> [glasgow] whitequark synchronize pull request #1181: [WIP] Redesign/reimplement firmware and add revD support - https://github.com/GlasgowEmbedded/glasgow/pull/1181
<_whitenotifier-e> [glasgow] whitequark reviewed pull request #1181 commit - https://github.com/GlasgowEmbedded/glasgow/pull/1181#discussion_r3494958943
<_whitenotifier-e> [glasgow] whitequark reviewed pull request #1181 commit - https://github.com/GlasgowEmbedded/glasgow/pull/1181#discussion_r3494961874
<_whitenotifier-e> [glasgow] whitequark synchronize pull request #1181: [WIP] Redesign/reimplement firmware and add revD support - https://github.com/GlasgowEmbedded/glasgow/pull/1181
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<josHua[m]1> FX5/FX10/FX20 are ludicrously expensive. I cannot believe how much they are asking for it. I've used it for prototype but for any kind of production it like doubles the BOM of anything else
<josHua[m]1> the FX20 on this board is almost more expensive than the gigantic FPGA sitting next to it
<whitequark> that is true
<whitequark> if we had a toolchain for it we could use a Zynq on Glasgow
<whitequark> iirc that has USB3?
<whitequark> it definitely has USB2 at least
<whitequark> oh i guess 7-series has 2 and US+ has USB3
<josHua[m]1> it is really nice to have it as an interface to this FPGA, and it has been very reliable once I got it to actually work, to use Gen2x2 to get five cameras worth of data into my Mac Studio
<whitequark> yep
<whitequark> there are reasons besides not having a reasonable package that we're not using FX3G2
<whitequark> part of it is the effort of supporting two firmwares at this specific moment
<whitequark> but part of it is cost! the corebai chip is like... 4 times less expensive I think?
<josHua[m]1> (I wonder if I can convince the client to open source the LiteX IP that I wrote to sync and speak to FX20.)
<josHua[m]1> how much is the Corebai part?
<whitequark> 16.5 RMB in 2024
<josHua[m]1> oh that is not many RMB
<whitequark> exactly
<whitequark> it's not quite free but it's not far from it
<whitequark> on par with adding a connector or two to the BOM
<whitequark> i think the RAM chips we have on revD are 3.5 times more expensive (each)
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<whitequark> should find some CN vendor who sells OctoSPI devices
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<whitequark> the pull circuit on revD0 doesn't seem to work right... wonder why
<josHua[m]1> by interesting comparison, Trion T8 is 15 kbyte of block RAM and is ~$4 qty1.5k; T13 is 90 kbyte is more like $9; and then you still need to add a NV boot flash
<whitequark> does T8 have USB?
<josHua[m]1> I guess you would also probably want to glue on an ULPI PHY
<whitequark> and then you need an entire USB stack, and a way to put a gold bitstream in the NVM, and make sure it never gets erased...
<josHua[m]1> right
<whitequark> i really like FX2 because it's unbrickable. you will never, ever, end up needing to flash your debug tool
<whitequark> any competing solution has to be at least that good
<whitequark> NVM with hardware WP# and gold bitstream in top half could work
<josHua[m]1> they can twin-boot from flash, as long as you can protect it
<whitequark> yes, they usually can
<whitequark> then you also need to be very confident your USB stack is good
<whitequark> and i try not to be responsible for an entire USB stack RTL because it's kind of a minor nightmare
<josHua[m]1> right
<whitequark> especially if hubs are involved
<whitequark> it is definitely an option! but it's an option I'm avoiding very hard
<josHua[m]1> yeah, I mean, this is not to say that it woudl be the easiest option, or even a good option. and it is still more expensive than the Corebai!
<josHua[m]1> but it is getting closer to the point that it is possible these days
<whitequark> also with Corebai, you order 2.5K and then wait 6-8 weeks, so I think they manufacture them on demand?
<josHua[m]1> oh that's scary.
<whitequark> I mean there are stocks at LCSC and so on
<josHua[m]1> if the Corebai had not come along, and we were still at the whim of Cypress, a PLD-based FX2 analogue would have been a much more compelling option
<whitequark> yes
<whitequark> I think I could probably design a part where the basic USB bootloader is very robust and easy to audit
<whitequark> and then you can bootstrap up from that to anything else meaning you don't need the rest to be perfect
<whitequark> i.e. what the FX2 has basically
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<whitequark> i think i am capable of writing RTL that parses one setup packet, stashes the result into some sort of NVM, then boots into it
<whitequark> one type of setup packet i mean
<josHua[m]1> right. I mean, valentyusb seems pretty well field-proven at this point
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<whitequark> I'd probably want to use LUNA to keep the codebase manageable, but yes it's an option to use an existing stack as a black box in gold RTL
<ldcd0[m]> the other thing that makes me think the 2g3 is just a 5 is that if they actually wanted to sell them in quantity they'd probably also adjust the metal so it can be bonded into a QFN
<ldcd0[m]> if they're already spinning new masks for everything
<whitequark> point
<ldcd0[m]> LGA makes me think they're just taking their FX5 they designed for BGA and ordering a slightly cheaper LGA package
<ldcd0[m]> but also the whole thing seems like a mess so maybe they are just making bad decisions for no reason
<josHua[m]1> Infineon.txt
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<_whitenotifier-e> [glasgow] ld-cd reviewed pull request #1181 commit - https://github.com/GlasgowEmbedded/glasgow/pull/1181#discussion_r3495154944
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