whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · play https://amaranth-lang.org/play/ · code https://github.com/amaranth-lang · logs https://libera.catirclogs.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
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<lethalbit[m]> torii
<lethalbit> oops, my bad, wrong terminal, sorry
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<catimor129[m]> hello, is there a simple way to add attributes (* use_dsp = "yes" *) when using verilog.convert?
<whitequark[cis]> where do you want to add these attributes?
<catimor129[m]> i generate the verilog then use vivado, and mapping to dsps doesn't seem to work without it
<catimor129[m]> oh sorry i misread above the top module
<whitequark[cis]> it might be easier to do set_property USE_DSP yes [get_cells top] in a vivado script
<catimor129[m]> alright ty