stikonas has quit [Quit: Konversation terminated!]
<dsimic>
pinchartl: hmm, could that be a power button instead?
<dsimic>
if it's actually wired to the PMIC's over-temperature protection, which is the way reset buttons or Rockchip boards are made, it couldn't be ignored and requires no configuration at all
<pinchartl>
according to the schematics the signal is called PMIC_RESET_L
<pinchartl>
the compute module interface documentation states
<pinchartl>
RESET,PMU IN And RK3588S
<pinchartl>
Bidirectional pin. Can be driven low to Reset the CM5 CPU
<pinchartl>
on another board from the same vendor, it is wired to the PMIC's RESETB pin and the RK3588S NPOR pin
diederik_ is now known as diederik
<dsimic>
pinchartl: ah, I see, it's an RK3588S setup, which is different
<dsimic>
quite frankly, I haven't researched the way reset keys are implemented on RK3588 boards, especially with dual-PMIC layouts
<dsimic>
but I see now that the RK3588 reference design, as well as the QuartzPro64, use the SoC's power-on reset line for that purpose
<dsimic>
so, the PMIC's over-temperature protection is no longer used there
<dsimic>
though, I'm not sure can the RK3588(S) ignore the power-on reset line under certain conditions
<dsimic>
let me check the RK3588 datasheet as well, albeit a bit later...
Daanct12 has joined #linux-rockchip
_whitelogger has joined #linux-rockchip
hexdump02 has quit [Ping timeout: 256 seconds]
hexdump02 has joined #linux-rockchip
naoki has joined #linux-rockchip
<dsimic>
Dex2x: good news, I just received a confirmation that a local Raspberry Pi distributor will donate a Raspberry Pi 5 8 GB to me, so I can test the patches for supporting A2-rated microSD cards on it as well :D
<dsimic>
I've got a Raspberry Pi 4 already, so that's covered as well
hexdump02 has quit [Ping timeout: 250 seconds]
walter has joined #linux-rockchip
<dsimic>
pinchartl: just went through the hardware design manuals and the TRMs, so I'm quite familiar now with the way reset buttons are intended to be implemented on RK3588(S)-based boards
<dsimic>
with all that in mind, the way you described how the reset button is wired seems correct, i.e. according to the hardware design manuals
<dsimic>
which the QuartzPro64 also follows closely, for example
<dsimic>
however, it's now puzzling how and why it doesn't work as expected, as I saw no means to disable the SoC reset line in software
<dsimic>
maybe you could try configuring rockchip,hw-tshut-mode to use GPIO, simulate a thermal runaway even and check will the board reset?
<dsimic>
that scenarion would/should be pretty much equal to pressing the reset button
<dsimic>
s/scenarion/scenario/
<dsimic>
s/even/event/
indy has quit [Ping timeout: 255 seconds]
indy has joined #linux-rockchip
System_Error has quit [Remote host closed the connection]
Stat_headcrabbed has joined #linux-rockchip
System_Error has joined #linux-rockchip
System_Error has quit [Remote host closed the connection]
franoosh has joined #linux-rockchip
System_Error has joined #linux-rockchip
macromorgan_ has quit [Read error: Connection reset by peer]
macromorgan has joined #linux-rockchip
Stat_headcrabbed has quit [Remote host closed the connection]
System_Error has quit [Remote host closed the connection]
cbeznea has joined #linux-rockchip
System_Error has joined #linux-rockchip
System_Error has quit [Remote host closed the connection]
franoosh has quit [Remote host closed the connection]
System_Error has joined #linux-rockchip
franoosh has joined #linux-rockchip
Stat_headcrabbed has joined #linux-rockchip
franoosh has quit [Remote host closed the connection]
franoosh has joined #linux-rockchip
eballetbo has joined #linux-rockchip
Stat_headcrabbed has quit [Read error: Connection reset by peer]
Stat_headcrabbe1 has joined #linux-rockchip
ldevulder has joined #linux-rockchip
Stat_headcrabbe1 is now known as Stat_headcrabbed
naoki has quit [Quit: naoki]
naoki has joined #linux-rockchip
godvino has quit [Remote host closed the connection]
Stat_headcrabbed has quit [Quit: Stat_headcrabbed]
godvino has joined #linux-rockchip
ldevulder has quit [Quit: Leaving]
ldevulder has joined #linux-rockchip
dsimic has quit [Ping timeout: 264 seconds]
dsimic has joined #linux-rockchip
<pinchartl>
dsimic: I'll try to check that
hexdump02 has joined #linux-rockchip
psydroid2 has joined #linux-rockchip
UndrWater has quit [Quit: ZNC 1.9.0+deb2ubuntu0.1~esm2 - https://znc.in]
UndrWater has joined #linux-rockchip
Daanct12 has quit [Quit: WeeChat 4.7.1]
naoki has quit [Quit: naoki]
naoki1 has joined #linux-rockchip
naoki1 is now known as naoki
naoki has quit [Quit: naoki]
naoki1 has joined #linux-rockchip
naoki1 is now known as naoki
naoki has quit [Read error: Connection reset by peer]
naoki has joined #linux-rockchip
naoki has quit [Read error: Connection reset by peer]
naoki1 has joined #linux-rockchip
naoki1 has quit [Read error: Connection reset by peer]
naoki has joined #linux-rockchip
naoki has quit [Client Quit]
naoki has joined #linux-rockchip
naoki has quit [Quit: naoki]
naoki1 has joined #linux-rockchip
naoki1 is now known as naoki
walter has quit [Quit: Konversation terminated!]
<Dex2x>
dsimic, aah that is so cool
<Ermine>
Do all rockchips come with designware usb host controllers?
naoki has quit [Quit: naoki]
naoki1 has joined #linux-rockchip
naoki1 is now known as naoki
naoki has quit [Quit: naoki]
naoki1 has joined #linux-rockchip
naoki1 is now known as naoki
<sre>
Pretty much all SoCs are using Synopsys' DWC3 controllers for USB3 (not just Rockchip). A few (but no Rockchip SoCs AFAIK) use the Cadence controllers instead and that's about it.