#litex on 2025-06-13 — irc logs at libera.catirclogs.org

2021-05-24 10:26 _florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex

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06:32 <keesj> Is there an example of similating MiniSoc? I have a MiniSoC with no cpu and just the wishbone brige (and some custom IP in verilog) and I would like to test it under simulation

06:37 <keesj> https://gist.github.com/jevinskie/510e8372f3a77fc984dde298e8f4a178 might also be intersting (cocotb)

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