_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<keesj> Is there an example of similating MiniSoc? I have a MiniSoC with no cpu and just the wishbone brige (and some custom IP in verilog) and I would like to test it under simulation
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