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<bjdooks>
alexghiti: ok, thanks, i've had little time to do anything on this for a while and it would be nice to get it moving before I get shoved onto something awful
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<shadows>
conchuod: and <20250903101346.861076-1-e@freeshell.de> I just sent but that is in anticipation of Hal's series to add VisionFive 2 Lite (JH7110s CPU), so we don't end up with those changes as part of adding a board dts. No hurry especially though, I want to know Esmil's thoughts if they have time to review.
<shadows>
I'm excited for deduplication of dts work in U-Boot for these JH71xx boards just send it upstream to Linux and nail it down to the U-Boot build system when it lands by way of devicetree-rebasing :)
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<lechner>
Hi, how may I find out whether a particular piece of risc64 equipment supports mmap's PROT_EXEC and PROT_WRITE, please?
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<bjdooks>
ldts: i think anything with a standard mmu (ie, capable of running a protected OS such as linux/bsd) should do all of those
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<lechner>
bjdooks / okay, thanks!
<lechner>
Hi, is the 00008067 opcode the standard way to return from a function? I see a segmentation fault with the little-endian bytevector 103 128 0 0 (decimal) even though the start is aligned to a page boundary. Also, how may I find out whether my system is little-endian, please? Thanks!
<bjdooks>
system is very likely to be little endian, don't think /anyone/ has a in-production big-endian
<bjdooks>
you'd be better of using .insn for instructions
<bjdooks>
there's an alignment requirement
<lechner>
just four bytes though, right?
<lechner>
also, i am not using a standard assembler but instead mmap and write the bytes (for bootstrapping reasons) it works in production on x86_64 and aarch64.
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<lechner>
Does riscv64 have an NX bit that might disallow exec in memory that's also writable?
<jrtc27>
have you read the spec to look at the PTE format?
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<jrtc27>
the set of permission bits it documents will quite easily and clearly answer that question for you
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<sorear>
specifically the "privileged" specification, look in the supervisor chapter