07:22 <jeandet_> Hello, that one took me a lot of time to figure out https://github.com/enjoy-digital/litex/blob/master/litex/soc/interconnect/csr.py#L98-L100, I'm not sure about the rational behind this choice ('we' for reads and 're' for writes)

07:27 <tnt> jeandet_: yeah ... same .... :)

07:33 <jeandet_> apart from that, I really enjoy LiteX. I started with the GRLIB 17 years ago, which was already nice at that time, but LiteX is way more pleasant. Not dealing with AMBA directly for simple registers is really nice and that stream abstraction too.