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<mawk>
hi
<mawk>
I can't run multiple openocd instances using the raspberrypi-native interface, even when all of them are using different GPIO pins and have the tcl/gdb/telnet disabled
<mawk>
it seems like they are competing for access to the GPIOs
<mawk>
they can't toggle SRST together
<Haohmaru>
no common pins between the different instances?
<Haohmaru>
is this like openocd using crapberry-pie's pins to "bitbang" SWD ?
<Haohmaru>
SWD+reset perhaps
<Haohmaru>
are they using some sort of.. how was it called, PORT.OUTSET = 0x01; to set a pin without touching the other pin values like it's common on fancy MCUs?
<Haohmaru>
"atomic" port registers or something
<Haohmaru>
versus the dumber kind, like on an old atmega/pic PORTB |= 0x01;
<PaulFertser>
mawk: but you if you want SWD then you'll probably need SWDIO on different ports as SWDIO needs to be switched between input and output all the time by definition.
<Haohmaru>
GPIO_SET and GPIO_CLR looks like it's the "fancy atomic" scheme, but..
<PaulFertser>
Haohmaru: yes, that's my point
<Haohmaru>
mmm bcm2835_gpio_synchronize();
<Haohmaru>
was ist das ;P~
<PaulFertser>
Haohmaru: "git blame" and commit message will answer
<Haohmaru>
sorry, i don't schprachen ze git very much
<Haohmaru>
but it begins to smell like maybe it's not as simple, maybe there's some scheme similar to "virtual ports" on the xmega/SAME stuff
<Haohmaru>
or maybe something completely different
<Haohmaru>
in any case, i don't even have (nor want to have) any SBCs
<Haohmaru>
iirc on XMEGA you had a few virtual ports which was like, the same periph struct as a normal port but at a different address, and you can modify a pile of the registers in that, and then afaiu, you can "apply" that whole setup to an actual real port periph with like 1 instruction
<Haohmaru>
but i haven't used it and i'm not sure if the above is correct ^
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<mawk>
it's already push pull PaulFertser
<mawk>
what do you mean by different ports§
<mawk>
all of my three sets of STDIO, SWCLK, SRST are on different pins
<mawk>
you mean different GPIO chip?
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<antto>
mawk, pins are often grouped into ports
<antto>
one effect of this is so they can be represented as bits in a byte/word so you can read or write the current states of a whole port of pins at a single point in time, for things like parallel communication
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<mawk>
ah I see
<mawk>
but there are 32 accessible pins
<mawk>
and they're all grouped together
<mawk>
there are 32 more but they're not on the pin header
<mawk>
and internal stuff is connected to them anyway
<mawk>
PaulFertser: and if I use the old sysfs interface? that should be pin-level access right
<mawk>
instead of group-level access
<mawk>
and the kernel will serialize operations
<mawk>
then it will be a bit slower but whatever
<mawk>
Hammdist: ARM has the same thing
<mawk>
bitfields at a specific address
<mawk>
but it's just an addressing trick
<mawk>
amd64 doesn't have it that I know of
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<PaulFertser>
mawk: libgpiod should work
<PaulFertser>
sysfsgpio is much much slower
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