09:40 <jjulian> Looking through that huge patch, one sees the JTAG hub channel selection happening in this function: https://github.com/LatticePropel/propel-sdk/blob/master/openocd_riscv/openocd_riscv.patch#L625

09:40 <jjulian> My understanding of JTAG is not enough to tell whether the instructions sent to the "cableserver" are actually JTAG instructions that could be sent using another interface as well or if it's something that the cableserver interprets before instructing the device further.

10:27 <PaulFertser> jjulian: this actually looks really promising

10:28 <PaulFertser> jjulian: I guess since you're working with FPGA this picture https://www.allaboutcircuits.com/uploads/articles/jtag-part-ii-the-test-access-port-state-machine-SG-aac-image2_2.png should tell you most things you need to know about JTAG, it's just a simple state machine, nothing fancy.

11:37 <jjulian> PaulFertser: Thanks, I will take a look

11:41 <PaulFertser> jjulian: each device on the tap has an Instruction register of (normally) fixed length, so the adapter first runs through the states to load IRs of all the devices connected with the corresponding commands (often times it's BYPASS for every tap but one).

11:42 <PaulFertser> jjulian: and depending on the currently loaded IR each device would connect a specific Data Register when they're switched into Shift-DR etc states. In BYPASS it's just a dummy one-bit register.

11:43 <PaulFertser> jjulian: I'd be happy to clarify the JTAG part of this all, please ask questions. Looking at the code it really looks like the cable server is just executing regular JTAG state moves and loads.

11:44 <PaulFertser> So one thing to keep in mind is that all the taps in the chain are always in the same JTAG state, and depending on state they might have different "shift registers" connected between their TDO and TDI.