00:02 <Wanda[cis]> like Versal, this thing no longer has a bitstream; instead, it involves a hard CPU (microblaze probably?) with a bootrom, and then some firmware for it in flash next to the actual configuration data which is shoveled through said CPU

00:13 <Wanda[cis]> ... oh, it's actually RISC-V, huh

00:16 <Wanda[cis]> like. they don't say it's RISC-V. but.

03:39 <mupuf> "no longer has a bitstream" --> you mean that it no longer has a bitstream fixed in hardware, right?

03:40 <Wanda[cis]> I mean it's no longer configured via the same means as earlier FPGAs

03:40 <mupuf> Instead, you need to first upload a firmware on this bitstream processor firmware, and then feed that firmware?

03:40 <Wanda[cis]> sorta yeah

03:41 <mupuf> interesting... I wonder if this is to improve the flexibility of the partial reconfiguration

03:41 <Wanda[cis]> I think it's for more flexible crypto bullshit actually

03:41 <mupuf> like... automatic partial reconfiguration based on FPGA inputs

03:42 <Wanda[cis]> nah you could already do that earlier

03:42 <mupuf> crypto on the bitstream?... Sadly, that would indeed make sense

03:43 <Wanda[cis]> secure boot type of stuff

03:44 <Wanda[cis]> the functionality diff with previous generation configuration is mostly about added crypto primitives

03:44 <Wanda[cis]> that and configuration from Octal SPI, but I doubt that was the driver to make the whole thing RISC-V based

07:35 <zyp[m]> microblaze v has existed for a while now

11:13 <Wanda[cis]> ohh, they pulled a mips?