ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<Peng_Fan> robher: krzk: conchuod: Would you please help give a look on https://lkml.org/lkml/2025/6/6/48, "dt-bindings: remoteproc: fsl,imx-rproc: Add support for i.MX95"?
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<krzk> Peng_Fan: there is still no NXP review, you can ping them first.
<krzk> IOW, you can ping less busy people first instead the busier ones
<Peng_Fan> krzk, is NXP review a new rule for binding patches? I could ask Frank Li to give a look
<Peng_Fan> I saw you gave some comments on other newer binding patches, so I thought my patch might be overlooked
<krzk> No, it is not a new rule, there is no such rule.
<Peng_Fan> No rush, I will ask NXP guy to review first
<Peng_Fan> Thanks
<krzk> To me all these IDs look unusual and I could not find any rationale in commit msg helping me to understand why phandles are wrong or why IDs are allowed here
<krzk> so I just put it to the end of the queue
<krzk> You have entire NXP to help you such common cases - IDs are not allowed and CPUs are referenced by phandles
<krzk> btw, don't ever link to lkml :/
<krzk> we switched to lore long time ago and old interface is discouraged
<Peng_Fan> my bad, I will use lore next time .
<Peng_Fan> Our SCMI firmware needs the IDs to start m7. The firmware exports the various IDs
<Peng_Fan> Driving a car, wait a few mins, I will wire
<Peng_Fan> Write more
<krzk> Just because someone put something to firmware does not mean you put it to bindings
<krzk> Again, explain why IDs are supposed to be allowed here
<krzk> Don't explain me why you want it, because eveyrone wants their stuff...
<krzk> To me this makes no sense in current explanayton - you have 8 cores, but only one can be put there, so what happens with the rest?
<krzk> And I don't think we care about something like remote and local ID - it is the same. CPUs have single number. So this looks like copy paste downstream and thus solve it internally first
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<Peng_Fan> krzk, let me give some background of i.MX95 SW which is based on SCMI firmware and linux works as an agent
<krzk> No, please re-work the patchset and come with concise answers to common questions
<krzk> Don't just push stuff because you want it to be accepted, but send something which actually follows mainline style and rules
<Peng_Fan> ok. I think to think about how to address, there is no logical machine node, logical machine is just like a system from SCMI perspective.
<Peng_Fan> There are several logical machines(lm) in one physical system, the m7 lm id is 1 to i.MX95
<Peng_Fan> I have no idea how to use phandle here.
<Peng_Fan> typoe: the lm id is 1 to NXP i.MX95 SCMI firmware.
<Peng_Fan> To cpu id, I could move it to driver.
<krzk> It was saying there CPU ID, so that's why I said phandle. Phandle to CPU.
<Peng_Fan> Without using phandle, the only way I could do is to move the IDs to driver, but I do prefer leaving fsl,lm-id in binding
<Peng_Fan> ok
<krzk> So this is soc specific? Then it does not go to DT... heh, where is the DTS using this?
<Peng_Fan> arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts in https://github.com/nxp-imx/linux-imx
<krzk> I mean, on the lists or next?
<krzk> I don't care about downstream DTS
<Peng_Fan> I not include the DTS patch in the patchset.
<krzk> This is not my question
<krzk> Where did you post it? (separate patchset)
<Peng_Fan> It is like this, I have not posted the DTS patch to list.
<krzk> Well, so there you go... you would get answer: this is SoC specific, so properties do not go to DTS
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<krzk> So next time, please post complete picture. if you got no replies on your patchset, go back and look what is missing, e.g. DTS
<Peng_Fan> Back to cpu-id, the i.MX95 NXP SCMI defines ID for the cpu cores, including M7. For A55, it is handled by SCMI firmware itself, and ATF will use the IDs. for M7, remoteproc need use some method to pass the ID to SCMI firmware to start M7
<Peng_Fan> There are two ways regarding the M7 cpu-id, 1. move it to driver; 2. #define IMX95_M7_CPU_ID 1 in a header.
<Peng_Fan> I could include DTS in V3, no problem. Regarding cpu-id, which do you prefer or other suggestions?
<Peng_Fan> In V3, the changes in my mind: 1: keep fsl,lmm-id 2: remove fsl,cpu-id 3: include soc dtsi and board dts.
<Peng_Fan> krzk, please let me know if you disagree.
<krzk> I still disagree, see earlier comments
<krzk> Work internally first on this, so this will match upstream, don't just push what you have.
<Peng_Fan> Ah. ok, I need to think a bit more on how to make it work.
<Peng_Fan> I need to drop off, late evening. thanks for discussing the binding patch with me.
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