<lvrp16>
so the rx counter is broken in pio mode, that's the cause of all the grief...
<lvrp16>
it goes up to 15 when the tx counter goes to 16
<lvrp16>
but you can still read from it once it reaches 0 :D
<lvrp16>
and XCH doesn't work all the time for < 800KHz on G12 and SM1 so it has to be retried.
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<lvrp16>
the 16th fifo entry is not reliable, sometimes doesn't work :D
<lvrp16>
and < 200KHz seems to have a delay problem.
<lvrp16>
lots to document for sure.
<lvrp16>
but everything else is working
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<lvrp16>
<200khz, need to delay for 1 cycle of the spicc and it will work. all the problems are resolved or worked around.
<lvrp16>
before spicc tx
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<minute>
lvrp16: oof, wow
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<lvrp16>
yeah, about 4 whole weeks of testing but now everything from PIO to DMA works and supports 1 to 64 bits power of two on gxl, g12, sm1. I don't have A311D2 and AXG to test.
<lvrp16>
DMA 9 word after a transfer is broken so I had to switch to PIO for the last burst
<lvrp16>
or rather DMA odd words after a transfer is broken