06:27 <mriesch> robmur01: it should be possible to have more than one iommus, right?

06:31 <mriesch> the rk3588 vicap has two mmus, but in downstream it is represented as one logical big mmu

06:32 <mriesch> with the current mainline iommu driver i hit some virtual address paging error something. using only one of the iommus did work as expected, though

10:41 <robmur01> mriesch: yup, the upstream binding works the same way, i.e. representing them as one logical IOMMU with multiple register interfaces

10:42 <robmur01> usually it's one for reads and one for writes, so I'd be kinda surprised if it worked with translation on one but not the other

11:08 <mriesch> robmur01: ah there is already support for that? neat

11:12 <mmind00> mriesch: you can see this for example also in tomeu's npu series for the "top" core

11:12 <robmur01> yeah, the multi-MMU notion goes way back to the RK3288 ISP

18:28 <mriesch> ah indeed, i just remembered CounterPillow already pointed me to the npu *facepalm*

18:30 <mriesch> it has been an eventful week...

18:30 <mriesch> anyway, thanks for the pointers, i'll give it a look next week

18:58 <CounterPillow> mriesch: yeah but I pointed in the wrong direction, I said the multiple cores have multiple iommus which isn't helpful as the top core having multiple ranges is what you actually needed :D