Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2025.04, v2025.07-rc1 are OUT / Merge Window is CLOSED, next branch is CLOSED / Release v2025.07 is scheduled for 07 July 2025 / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<mckoan> good morning
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<mattcrgh> Does anyone know how I could reduce the time of u-boot from 2.5 seconds on rk3588? Most of the time seems to be spent on ATF in SPL
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<f_> mattcrgh: well, TF-A will need to stay for sure
<mattcrgh> Yeah annoyingly
<mattcrgh> I think the weird proprietary binaries are faster even because they fail at points
<f_> in u-boot proper you can also reduce the pause time ("Press any key to stop autoboot")
<f_> if you don't mind losing functionality Falcon mode might also be interesting to look at
<mattcrgh> Yeah I would like to, but not if I can only save 500ms
<mattcrgh> Proper only takes 500ms
<f_> okay, then don't think there's that much you can do.
<mattcrgh> Yeah I just wanted to know if it was a hard lower limit due to the ATF
<mattcrgh> Do you think disabling memory would do much?
<f_> ¯\_(ツ)_/¯
<f_> SPL is the one that inits DRAM
<mattcrgh> Is there anything I can disable that could have the side effect of making ATF need to do less?
<mattcrgh> Even if it gimps the hardware, I don't need all these cores and ram
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<marex> bring the hardware up in SPL ... takes some effort, but it is worth it
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<matthewcroughan> marex I managed to use BOOTSTAGE=y to determine that `1,186,577  board_init_r`
<matthewcroughan> which means 1.1 seconds for board_init_r
<matthewcroughan> spl isn't where all the time is spent as it turns out
<matthewcroughan> https://termbin.com/8tnu
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<marex> matthewcroughan: huh
<marex> matthewcroughan: there is a way to insert markers at specific points, to narrow the delay down
<marex> BOOTSTAGE_MARKER() I guess ... try it in common/board_r.c
<matthewcroughan> I did end up doing this, and still wasn't able to figure it out, there's a mysterious 1.4s delay that isn't traceable via the INITCALL stuff
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* clever waves
<matthewcroughan> with clever :D
<clever> we had initially just shoved `bootstage_mark_name()` at random points in the init loops to bisect and try to narrow down the delay
<clever> marex: but it wasnt proving useful, so we then tried printing `timer_get_boot_us()` within the `INITCALL()`, and that revealed a 1.4 seconds delay before display_text_info (the first INITCALL?) and a 1 second delay between `run_main_loop` and `start_kernel`
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<Tartarus> sjg1: Did you update ellesmere for your proposed merge or something? https://source.denx.de/u-boot/u-boot/-/jobs/1128001
<Tartarus> I only noticed this because I was attempting to normalize how you start test.py and get it to generate and save the junitxml results from the tests.
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<matthewcroughan> marex: if I use the proprietary vendor BL31, boot times are reduced by 400~ms but BOOTSTAGE is none the wiser
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<marex> matthewcroughan: could it be that bootstage accounts for the SPL run time ?
<marex> matthewcroughan: i.e. vendor blob runs 400ms, SPL runs 1.2 seconds ?
<marex> if yes, dig into the SPL
<marex> or ... use DEBUG_UART and stick some printf("%d\n", _get_timer(0)); before the initcalls start , that will give you current timer start, which likely counts from 0 on boot
<matthewcroughan> marex:  did exactly that but it doesn't start from 0
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<matthewcroughan> marex: here's a diff of what I've been playing with https://termbin.com/r9bl
<matthewcroughan> And here is what that results in, in terms of logs https://termbin.com/rozo
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