<conventia[m]>
Is it possible to tell which adder implementation is used to implement the + operation on some signals?
<conventia[m]>
*
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<whitequark[cis]>
can you elaborate on what you mean by "which adder implementation"?
<conventia[m]>
ripple-carry, brent-kung, kogge-stone, etc? Or for counters, perhaps using a counter implementation with JK flip-flips
<whitequark[cis]>
this is entirely dependent on the synthesizer you are using and its choices; there is no standard way to convey this information in a netlist so there isn't anything amaranth can do
<whitequark[cis]>
no synthesizer i know of will use ripple carry for an adder like this, due to the timing issues
<whitequark[cis]>
same for JK flops
<conventia[m]>
I guess if you want a specific adder, you can just specify it manually. 😛 Thanks.
<conventia[m]>
This counter doesn't seem to have timing issues? Or were you thinking of a different implementation?
<whitequark[cis]>
FPGAs don't have JK flops so i never think of things in terms of JK flops
<whitequark[cis]>
wait
<conventia[m]>
Ah, they just have D flip flops.
<whitequark[cis]>
sorry, I misunderstood what you wrote for a bit
<whitequark[cis]>
the specific thing that has timing issues is dividing a clock by a power of 2 by connecting D_x=Qn_x and CLK_x+1=Q_x
<whitequark[cis]>
which is also a ripple carry counter, but the "ripple carry" part isn't the problem there, it's how you synchronize things; timing analyzers often have trouble with the clocks connected this way
<conventia[m]>
Thanks again.
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<whitequark[cis]>
in the JK chain you have, i think if you replace JK flops with D flops and add a XOR it still works the saem
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<benny2366[m]>
just got pointed to this project , I have one question . Do I need to install the board definitions separately or do they become pre installed?