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<Micko[m]> Guess I missed lot of progress. It is nice that XO1/2/3 are in. Good work Wanda
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<Wanda[cis]> it's just the routing database though
<Wanda[cis]> I don't currentlyhave plans to do actual bitstream reversing of ECP*
<Micko[m]> btw there are some ECP3 boards on aliexpress ( like https://www.aliexpress.com/item/1005008611836768.html )
<Wanda[cis]> (Ultrascale is in front of it in the pipeline)
<Micko[m]> understandable, it is still good that it is in
<Wanda[cis]> also prjcombine-ecp is going to be a giant target
<Wanda[cis]> given the sheer amount of FPGAs included
<Wanda[cis]> (the plan is to cover ECP*, XP*, XO*, SCM, crosslink, nexus, avant, gw1n, gw2a, gw5a with a unified codebase)
<Micko[m]> yeah, they are similar, but will be fun handling all the differences and exceptions
<Wanda[cis]> oh yes
<Wanda[cis]> that said
<Wanda[cis]> the Lattice FPGAs are ridiculously similar to each other
<Wanda[cis]> with Xilinx I gave up pretty quickly on a single unified target and had to split it up into like 7 distinct ones
<Wanda[cis]> meanwhile Lattice ... the only one I'm not sure about from the above list is avant; that thing is giving me Versal vibes and that's very much not a good thing
<Wanda[cis]> everything else goes into the rectangle hole
<Wanda[cis]> (also the ancient Orca stuff will likely either be a separate target, or get unified with ancient Xilinx stuff)
<Micko[m]> for ECP5 and XO2/3 most of the code is shared, in pack you are actually handling different primitives so same code base can be used, but most of differences are due to how prjtrellis was handling some things in bitstream that can be solved in different way
<Micko[m]> oldest Lattice boards I have are MachXO (1st one) and XP2 evaluation boards, but stopped bitstream reversing long time ago for both, XO was progressing better in that moment
<Wanda[cis]> XO looks like a nice snack-sized FPGA
<Wanda[cis]> like, could probably reverse the bitstream in a few evenings given the existing infrastructure
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<galibert[m]> Is there something in common between the gowin fpgas and tang dynasty/anlogic
<galibert[m]> ?
<Wanda[cis]> but then that'd be a gateway drug to reversing all of ECP* and co, so maybe let's not
<Wanda[cis]> galibert[m]: gowin is very directly based on ECP3, down to low-level primitive details; anlogic ... it has the vibe of being based on lattice devices, but it's more like a loose reinterpretation
<Wanda[cis]> like I'm reasonably confident that ECP3 is more similar to GW1N than to ECP5
<Wanda[cis]> (it's far from a straight-up copy though; they did change a bunch of stuff)
<Wanda[cis]> update: have been asked out on a snack-sized FPGA reversing date, so we may get XO bitstream data sooner than later
<Micko[m]> nice :)
<Wanda[cis]> I fucking love neocad
<Wanda[cis]> it's so easy to screw with
<Wanda[cis]> I just tell it to enable some random pips in the middle of nowhere and it happily does so
<Wanda[cis]> at worst a DRC warning
<Wanda[cis]> I think this shows respect for the working catgirl
<Wanda[cis]> like. you're going to get reversed anyway. why make it hard.
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<whitequark[cis]> nice