<vancz>
I might have gotten cxxrtl to deadlock or hang or something
<vancz>
nevermind, im quite sure im just tired and paused the debugger in that part of the loop
<vancz>
OK so I'm raisin g a signal and nothing is happening and I cannot figure out why or where nothing is happening :V
<whitequark[cis]>
can you show your code
<vancz>
I asked the LLM and it was empirically right ;_;
<vancz>
one second
<vancz>
getting some sleep also seems to have helped
<whitequark[cis]>
going "the llm" with the same cadence as "the wife"
<vancz>
Im trying to actually get better at things instead of just seeing what sticks, but I'm kinda dumb. Also getting unstuck is nice. (When it actually does help.) Im a low key AI doomer waiting to become completely obsolete...
<vancz>
So anway I had to add this to the IRQ machine:
<vancz>
irq_pending <= 0;
<vancz>
else if (read_state == DO_READ && irq_pending && !valid) begin
<vancz>
end
<vancz>
instead of this in the read machine:
<vancz>
//irq_pending <= 0;
<vancz>
I'm not great at running state machines in my head, I think the delay and synchronization provided by clocking should make the two machines not race on this line, but this seems to have actually fixed the problem.
<vancz>
The whole thing is supposed to be an echo machine (talking to a virtual serial device)
<vancz>
and verilator didnt give me any warnings, though I haven't tried too hard to set it up. So maybe I missed something, or this just isn't something to warn on.
<vancz>
Ok I need to figure out how to do this VCD thing you implemented.
<vancz>
I need to stop running head first at the wall with this so much,
<whitequark[cis]>
tomverbeure's posts should show it
<vancz>
yeah I see code samples
<vancz>
does something just get very unhappy if multiple always blocks access a given line and i shouldnt even _try_ to do that regardless of if there are races or not?
<whitequark[cis]>
by line you mean wire?
<whitequark[cis]>
s/wire/reg/
<whitequark[cis]>
only one always block should assign a reg
<vancz>
apparently so
* vancz
tries to find a style guide or something that has that in its list
<vancz>
I imagine this is a super basic thing everyone knows
* vancz
should go check / skim the sutherland book again later
<vancz>
its suggested that maybe tools should warn about this but I dont see verilator or yosys giving me any warnings for this