sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
<shadows> hi all, looking for someone with a VisionFive JH7100 (not the JH7110 "VisionFive 2"), discontinued product so I can't get one myself to test the config change I proposed for Debian Trixie release to get SDIO WiFi+BT AP6236 chipset working... needs testing, anyone?
<shadows> also related is the Milk-V Mars CM and Mars CM Lite which have AP6256 chipset, same config change but then additional things need done on top of this for upstream; also seeking to collaborate with anyone interested in that
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<shadows> oh and thirdly I was sent a StarPro64 (EIC7700X CPU) rev1 dev board - anyone else here happen to have one of these? I'd like to learn how to enter USB Flash mask rom loader mode when there's no MSEL-DIP part on that revision of the board for boot selection
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<ganboing> shadows: I have a spare JH7100. If you need one I can probably sent it to you, but let me double check when I get home.
<ganboing> I also have EIC7700X, but that's a Hifive Premier P550. I'm surprised if there's no DIP switch to boot selection.
<ganboing> Oh, are you saying you have a pre-production board?
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<shadows> ganboing: yes, pre-production rev1 StarPro64 that the info team sent to me. I asked about the v1 schematic and the answer was it would be confusing to customers so they're not going to publish the schematic.
<shadows> ganboing: the short question I have is about how Debian Trixie works on the JH7100, I have asked for CONFIG_BRCMFMAC_SDIO kernel option to be included with Trixie release on the guess that it may help with the SDIO WiFi+BT module functionality
<shadows> I would like to know, does a standard install of Debian Trixie (from Debian official, not any vendor thing) fail to activate the SDIO WiFi+BT module?
<shadows> what I can see is that it would require devicetree description (yes it has this), Firmware descriptions (package firmware-brcm80211 from non-free-firmware official package repository), and kernel driver support which I think is missing at least that Kconfig option
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<ganboing> Which image I should be using for Debian Trixie?
<shadows> something like interrupt u-boot, transfer that file to memory address $loadaddr for example, then 'bootefi $loadaddr'
<shadows> err... does that board have U-Boot bootloader? I don't know
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<shadows> maybe that board belongs in a computer history museum
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<dramforever[m]1> shadows: do you happen to have a link or something that i can forward off of irc/matrix
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<ganboing> shadows: It looks like Debian Trixie 6.12.27-riscv64 kernel is not working well on my jh7110/vf1.
<ganboing> I booted up the installer, and the mmc/gmac is not working properly.
<ganboing> *jh7110 -> jh7100
<ganboing> I suspect it's due to the Incoherent cache in jh7100:
<ganboing> The RISCV_DMA_NONCOHERENT for jh7100 is there in v6.12, not sure if it's really working properly
<ganboing> Probably not waste too much time on this soc/board
<shadows> ganboing: ah, I agree not to waste too much time on that. Thanks for trying.
<Esmil> ganboing: the RISCV_DMA_NONCOHERENT upsteram works fine for the jh7100, but you need the ERRATA_STARFIVE_JH7100 that depends on NONPORTABLE, so it can't be combined with support for many other boards
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<ganboing> That's why! So I assume each distro needs to have a separate kernel package for these RISCV_DMA_NONCOHERENT boards, right?
<ganboing> Does Debian do that?
<Esmil> however the ESWIN EIC7700 has the same issue as the JH7100 and Samuel posted an RFC for a way to enable those chips without the need for the DMA_GLOBAL_POOL that needs NONPORTABLE
<Esmil> if that gets merged distributions will be able to support both the JH7100, EIC7700 and other boards in the same kernel
<Esmil> that hasn't happened yet though
<ganboing> Yea. I'm really annoyed that EIC770x is RISCV_DMA_NONCOHERENT. We already had this shit with starfive jh7100->jh7110
<ganboing> And we have to go through the same shit again...
<shadows> trying here to get the JH7110 SoM (Milk-V Mars CM) to go with its AP6256 SDIO WiFi+BT module for upstream patch to LKML and I was hopeful to have some example of the same driver and upstream devicetree configuration working as a proof that such thing is useful to extend for this one
<shadows> the cache noncoherence is a rabbithole I don't want to follow, either
<dramforever[m]1> what's the difference between this and dma-noncoherent in the dt
<dramforever[m]1> oh, no cache management instructions?
<dramforever[m]1> ... eic770x doesn't have CMO? come on
<ganboing> Yep, and no svpbmt
<shadows> I get confused why JH7110 in mainline Linux has both PINMUX() and GPIOMUX() macros; In this situation I want to set some GPIO pads for input and some for output to work with the AP6256 WIFI/BT-SDIO chip (brcm80211 brcmfmac driver in mainline Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml)
<shadows> pin 12 of AP6256 is pulled down by 10k resistor on connection to WIFI_REG_ON_H_GPIO33 so what, I have pinmux = <GPIOMUX(33, GPOUT_LOW, GPOEN_ENABLE, GPI_NONE)>; along with 'bias-disable' (because external pull-down) and 'input-disable' ?
<shadows> doesn't seem to be a GPOUT_NONE defined so I am guessing that for output operation to feed that macro GPOUT_LOW (?)
<ganboing> PINMUX() is a short version of GPIOMUX()
<shadows> I did not see where in GPIOMUX define that the bits for the function select are set; aren't they distinct?
<ganboing> It doesn't. The func is 0 in GPIOMUX macro expansion
<ganboing> PINMUX can set func, but it then sets doen=1 and then dout/din=0.
<ganboing> I see PINMUX is only used for those GPIOs whose id >= 64
<ganboing> They are special GPIO's that doesn't have doen/dout, and the code treats them specially
<shadows> the vendor (Milk-V Mars git repo for Mars CM branch) code circa Linux 5.10 has dt that shuffles bit values into vendor properties ref. https://github.com/milkv-mars/mars-buildroot-sdk/blob/dev-mars-cm/linux/arch/riscv/boot/dts/starfive/jh7110-milkv-mars-cm-emmc.dts
<shadows> assuming the then GPIO_IE(1) refers to input enable true (it is setting a bit value so I'm not 100% sure that it's not inverted) it's just setting input enable true on basically everything whether it's an input or an output ?
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<ganboing> I don't think it means input enable. It's very likely Interrupt Enable, because Interrupt Enable (IE), Pull-Up (PU) and Drive-Strength (DS) are in the same register
<shadows> oh I might be mis-reading this... O_O
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<shadows> the TRM uses "Input Enable" language and the description is in agreement
<shadows> Input Enable ("1: Enable the receiver"), Output Drive Strength [2mA=0,4mA=1,8mA=2,12mA=3], Pull-Up ("1: Yes"), Pull-Down ("1: Yes"), Slew Rate Control ("1: Fast"), schmitt trigger select ("1: Enable"), power-on-start ("1: Enable active pull-down for loss of core power"), ... reserved
<ganboing> My bad. Yea, it's Input Enable
<shadows> on the JH7110 if you're not using one of the defined assignments though, what exactly is going on? or maybe that's not a well formed question what I am trying to ask is about the macros and setting registers, if I'm not trying to use one of the pre-defined GPIO matrix assignments for some on-chip function and I just want enable input or output, for the purposes of the macro and bits are GPOUT_LOW and
<shadows> GPOUT_HIGH kind of virtual sources that set initial output state?
<shadows> that weird maybe-typo in arch/riscv/boot/dts/starfive/jh7110-pinfunc.h "sys_iomux gin" where elsewhere it's referred to as 'din'
<shadows> I'm looking at GPOUT_LOW GPOUT_HIGH GPOEN_ENABLE GPOEN_DISABLE and I supposed GPI_NONE then
<shadows> so, what, GPIOMUX(padnum, GPOUT_LOW for default low or GPOUT_HIGH for default high, GPOEN_ENABLE, GPI_NONE) as an output? and I guess maybe GPIOMUX(padnum, ?, ?, ?) what for input
<ganboing> jh7100 and jh7110 share similar GPIO/pinctrl controller
<shadows> it is relevant yeah, pretty similar
<shadows> that patch does not configure the pin used on the pwrseq node
<shadows> the mmc related pins make sense to me to some extent because all of the macro parameters are obviously what they're supposed to be
<shadows> looking at the AP6236 (for jh7100-common.dtsi) or what I have in-hand the AP6256 (Milk-V Mars CM what I'm writing dt for) it's not obvious to me how to configure those pins which connect the non-mmc lines
<shadows> at this point I don't even get Linux trying to load the brcmfmac driver and the message is that the mmc1 non-removable card could not be initialized. Huh
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<ganboing> mmc1? shouldn't it be mmc0?
<shadows> on JH7110 reference board VisionFive2 the eMMC is mmc0 and SD Card (SDIO) mmc1
<shadows> for Milk-V Mars CM Lite (no eMMC) the mmc0 is configured for SD Card and that also Mars CM (with eMMC) then mmc1 is reserved for the optional AP6256 module
<ganboing> Got it. It's flipped
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<ganboing> shadows: pinning you in private chat...
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<palmer> I'm going to miss the Linux patchwork meeting next week, my parents and my wife's parents come to town that day so it's just going to be chaos
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<drewfustini> Thanks for heads up, I hope you survive :)
* shadows :)
<shadows> what does it mean in devicetree /soc/i2c@10030000/interrupts=<35> is that 35 a GPIO? or unrelated.
<shadows> there's so much I don't even know what I don't know
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