sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<netmonk> hello, anyone familliar with riscv assmebly ?
<netmonk> i have illegal operan from gnu-as
<netmonk> operand
<netmonk> main.s:19: Error: illegal operands `sw t1,R32_GPIOC_CFGLR'
<netmonk> .set R32_GPIOC_CFGLR, 0x40011000
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<geertu> netmonk: You can't reference a full 32-bit address on a RISC CPU
<geertu> You first have to load R32_GPIOC_CFGLR in another register, which needs 2 extra instructions
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<netmonk> geertu: yes that's what i did for solving issue
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