klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<Mutabah> Hmm... Anyone here had success with the IOAPIC on real hardware? I'm testing with the classic 16550 serial controller, and looks like none of the 120 IOAPIC lines on this machine is seeing the interrupt (same code works on qemu, but that doesn't mean much)
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<araxestroy> I think the last time I experimented with the IOAPIC I ended up so frustrated I just gave up on it entirely and decided that anything that didn't support MSI/MSI-X would be serviced by cpu0
<araxestroy> it is a particularly obnoxious pile of half-assed solutions to a few problems
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<geist> hmmm i've been meaning to really tackle it some day but havne't
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<Mutabah> araxestroy: Acceptable workaround :)
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<heat> Mutabah: yes
<heat> careful about the IRQ redirections... they can suddenly change irq numbers or polarity
<Mutabah> yeah, none of those seem to matter for the serial controller - and no IOAPIC register changes state when the serial "irq pending" flag is set
<heat> is it possible you're poking the wrong IO ports, or poking them wrongly?
<heat> how did you check if it's there? ACPI hopefully?
<Mutabah> yep.
<Mutabah> ACPI, and although there's funky things in the registers (claims a verison of 0x20), linux on the same machine agrees
<Mutabah> and since it's a register pair, either it's a different device with a similar interface - or it's the actual IOAPIC
<heat> does sending work _without_ IRQs?
<Mutabah> LAPIC timer works, haven't tried an IPI
<heat> i mean serial
<Mutabah> (or forcing an IOAPIC interrupt)
<Mutabah> Oh, it should. IRR changes on the controller
<heat> i'm inclined to believe you just don't drive this 16550 variant properly
<heat> unless you disable the IO APIC and somehow get magically working things :)
<Mutabah> Well, I'll try the PIC next time I'm near that machine
<Mutabah> More fun: The XHCI controller hard-locks the machine when it's enabled :)
<zid> enabled how?
<zid> proper full driver init?
<zid> did you remember to take back control from legacy usb?
<zid> there's a release command that you *really* wanna do before you fiddle the controller, else you'll be fighting your SMM code and possibly crashing/looping inside your firmware
<Mutabah> Might be that... hmm... upon starting the command engine, everything stops - even the LAPIC timer (... iirc)
<Mutabah> (Playing Pathfinder right now, but taking notes for when I get back to dev)
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<Ameisen> So, based upon my reading of agner fog's stuff, x86 will generally assume that a forward branch is not taken when there is no prediction data. A Zen 3 chip like myself will statically first assume not taken, then taken, and then switch to branch prediction. However, it's ideal to have the 'not taken' branch be the hot path for purposes of instruction fetching and decoding
<zid> most backwards jumps are loops and thus expected to go 11110 and most forward jumps (or at least ones that aren't merely slightly backwards) tend to be if(!p) return;
<zid> and thus normally 0
<zid> so it makes sense how they've done it
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<zid> (which is why I also said that hints aren't very important)
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<zid> They work great *in place of* a branch predictor, but x86 has one