<tpw_rules>
slightly off topic but anybody seen anything about reverse engineering the hamming code used in a flash chip? it's a (256, 266) code and i can create arbitrarily many data word -> detection pairs but i don't have any visibility into the ECC bits
<whitequark[cis]>
what's a detection pair?
<tpw_rules>
(word, detection). like i can program a word, then program a different word on top and have the controller tell me if it sees no, one, or two bit errors
<tpw_rules>
(and in the case of no or one, the word it read)
<whitequark[cis]>
huh
<tpw_rules>
what do you mean? is that not understanding the problem, or pondering a solution?
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<Wanda[cis]>
hmm
<Wanda[cis]>
by program a different word on top
<whitequark[cis]>
i'm pondering the situation that could cause a problem like this to appear
<Wanda[cis]>
you mean you effectively get `decode(encode(A) & encode(B))` for arbitrary `A` and `B`, right?
<tpw_rules>
yes. this way i can test application response to specific types of corruption on specific data areas
<Wanda[cis]>
actually, can you also get `decode(encode(A) & encode(B) & encode(C))`?
<tpw_rules>
sure. i can program the same word as many times as i want
<tpw_rules>
that's actually a great thought, i think that solves my problem
<Wanda[cis]>
oh?
<tpw_rules>
(well actually not fully)
<tpw_rules>
i could just keep trying values until it gives me the decode status i want. but actually that would probably just end up with the ecc bits all zero and hoping that is a single bit error. which i think would be the case 0.1% of the time...
<Wanda[cis]>
so, (256, 266) code
<Wanda[cis]>
10 ECC bits
<tpw_rules>
yes. it's a SECDED system
<Wanda[cis]>
this is most likely the usual parity bit + XOR of encoded 9-bit positions Hamming code then
<tpw_rules>
i probably need to read up more on the hamming code theory and play around with logic solvers but i was hoping somebody might have seen this before, i'm not that familiar
<Wanda[cis]>
Xilinx uses something like that for their bitstream ECC
<Wanda[cis]>
the code size you mentioned matches that encoding perfectly
<tpw_rules>
i also know that a code of all 1s results in no errors. i have a couple other words if you have a model handy
<Wanda[cis]>
so, what is your goal here?
<Wanda[cis]>
reverse the exact bit-level pattern that gets encoded into flash transistors? you don't quite have enough information for that
<tpw_rules>
ideally, be able to have an arbitrary word, then create another word to write on top to cause the word to be read to have a single bit error without actually changing the read value. i haven't convinced myself that this is possible or likely
<Wanda[cis]>
do you want to be able to do that for any possible word, or do you just need some words where it is possible?
<tpw_rules>
i'd like to be able to do it for any word. i already have some words where it's possible
<Wanda[cis]>
I don't think it's possible for any word
<tpw_rules>
okay, fair enough
<tpw_rules>
grateful for your time, thank you!
<Wanda[cis]>
from what you've said, the code is likely to be inverted from the usual
<Wanda[cis]>
(since all-1 is a valid word)
<Wanda[cis]>
actually scratch that.
<Wanda[cis]>
you already have an obvious problem when overwriting the all-1 word
<Wanda[cis]>
it's not possible to construct a 1-bit error of an all-1 word in any way whatsoever, since any write you do has at least 3 zero bits due to the nature of the code
<Wanda[cis]>
so it's definitely not possible for arbitrary word. now, the question is how large is the class of the words where it is possible
<Wanda[cis]>
actually
<Wanda[cis]>
mei: hey math nerd, want a fun problem?
<Wanda[cis]>
so as for the properties of the code space
<Wanda[cis]>
valid single-bit error codes are actually quite common
<Wanda[cis]>
a completely random codeword has a 26% chance of being a valid single-error code
<duskwuff[m]>
in fact… does that class exist at all. if A & B is read as a 1-bit error of A, that would seem to imply that B can somewhat easily be corrupted into A
<Wanda[cis]>
that's not easily
<Wanda[cis]>
a program operation programs up to 266 bits
<Wanda[cis]>
a SECDED code protects against modifying up to 2 bits
<duskwuff[m]>
ah… fair, nm
<Wanda[cis]>
so restating the problem
<Wanda[cis]>
given A you want to find B such that there's exactly one bit position where encode(B) has a 0 and encode(A) has a 1 (so that you obtain a single-bit error wrt A)
<Wanda[cis]>
intuitively, this is more likely to succeed for A that has a lot of 0s in the representation
<tpw_rules>
i did not mean to nerd snipe the whole channel...
<Wanda[cis]>
oh oops
<whitequark[cis]>
that was the most predictable outcome ever
<Wanda[cis]>
... here's Cat about to say "madam this is Wendy's"
<ALTracer[m]>
<tpw_rules> "slightly off topic but anybody..." <- this sounds suspiciously similar to stm32h74x internal 266-bit flash (with 128 KiB sectors) and H72x (but not newer H7Bx which is 137-bit and 8 KiB), are you perhaps manipulating that?
<ALTracer[m]>
<tpw_rules> "ideally, be able to have an..." <- there are two problems, 1) whatever second 256-bit word you submit to overwrite still obeys 1->0 flash cell transition (no erase), 2) ditto for 10-bit ECC which underlying flash controller recomputes and tries to write in the same line, or do you have some control over both?
<ALTracer[m]>
Xobs has been doing some extended trickery involving Fletcher checksums to TI F02x of TMS57x at #blackmagic, you may like to talk about that there or in #microcontrollers
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<whitequark[cis]>
yep, known issues; there's going to be a few of these during the transition to the new applet API
<whitequark[cis]>
#813 is pending on a solution for pull resistors; until then I would suggest either using an older checkout or setting the IO voltage
<asjackson>
whitequark[cis]: *screams slightly* the gpib addon boards arrived... i based the header spacing on the EPROM board which I think uses different spacing
<asjackson>
happy to send you one of these if you think it'll work on an older glasgow, otherwise i'll order new boards with the spacing fixed haha
<jn>
hm, the error message for "you should set a voltage" is a bit unintuitive now: $ glasgow run jtag-pinout --pins A0:6 -> E: g.cli: cannot set I/O port(s) AB pull resistors to low={} high={}
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<whitequark[cis]>
<asjackson> "happy to send you one of these..." <- older glasgow? the spacing has not changed since the beginning
<whitequark[cis]>
<jn> "hm, the error message for "you..." <- see backlog
<asjackson>
whitequark[cis]: huh that's weird, i wonder what went on with the eprom board then. maybe kicad messed up opening it... or i accidentally moved one 😬
<whitequark[cis]>
i think i've never held one in my hands
<whitequark[cis]>
no idea if it fits
<asjackson>
ok well i just opened it and it is the correct size so who knows how i messed that up
<whitequark[cis]>
okay, I think I know how to handle pull resistors. alongside add_port_group, I'll add add_pull_group, with the same syntax but (of course) different constraints. you'd get back an object that lets you get/set pull resistor state individually or for a group of pins, and it'll integrate with the port voltage configuration, which will also be moved from Device to HardwareAssembly since the latter will be the source of truth for both
<whitequark[cis]>
this means that pins and pulls will be surfaced in the API as different entities, which seems
<whitequark[cis]>
fair since that's how they are physically implemented
<whitequark[cis]>
* this means that pins and pulls will be surfaced in the API as different entities, which seems fair since that's how they are physically implemented
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<tomkeddie[m]>
I was confused by this at one point. There was a tiny adjustment made somewhere in the rev C timeframe. It's so small that it's within the tolerance of the connectors.
<whitequark[cis]>
yeah, I think marcan made it; I missed the grid by a little bit
<whitequark[cis]>
it should be completely inconsequential