00:02
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whitequark[cis] >
try this PR
00:06
<
asjackson >
it may have done but after using connect_pin i get a thing about oe being active in both (which i guess i can fix with a comb)
00:06
<
asjackson >
also that was very fast haha
00:07
<
asjackson >
ah yes because some pins are always handled by the controller, i think i can fix this p fast
00:07
<
whitequark[cis] >
i mean yeah having oe active in both would be bad :p
00:07
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01:26
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jonimus[m] >
I was planning on trying out the spi analyzer more today but my back decided to flare up and meant otherwise, assuming its less bad this week I'll definitely be trying it out later this week. Thanks again Catherine!
01:29
<
whitequark[cis] >
you're welcome ^^ hope it works well
01:49
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 31aa505 - simulation.assembly: run other testbenches after the main testbench.
02:21
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05:22
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 5d35a1b - applet.interface.qspi_analyzer: new applet.
07:40
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08:12
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asjackson >
when do you sleep o,,,o
08:13
<
whitequark[cis] >
"sometimes"
08:26
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08:31
<
whitequark[cis] >
well, it's up to me
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08:31
<
WilfriedWonkaKla >
that does not sound too healthy...
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08:57
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 41107b3 - protocol.sfdp: refactor. NFCI
08:57
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark cc45cb1 - applet.memory.25x: add SPI dump decoder.
09:18
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark c63e469 - applet.interface.{spi,qspi}_analyzer: increase default buffer size.
09:19
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 1bf7abf - hardware.assembly: significantly increase buffer sizes.
09:20
<
whitequark[cis] >
okay, i think i'm more or less done fiddling with SPI/QSPI analyzers
09:20
<
whitequark[cis] >
those of you who have devices, especially devices with very fast SCK: please test the applets!
10:09
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 22db1a6 - manual: embed and link to applet argparse docs.
10:25
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark b1307c2 - manual: actually add applet docs this time.
10:32
<
asjackson >
well i have the tests working for one character... but then the FSM thinks its sent an acknowledgement but the interface never received it
10:32
<
asjackson >
maybe after lunch i will see the problem
10:37
<
asjackson >
very exciting to see
10:46
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 8804d0e - software: use the plugin system for applet tools as well.
12:31
<
_whitenotifier-5 >
[GlasgowEmbedded/glasgow] whitequark 4b2eafa - manual: upgrade Sphinx.
12:38
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asjackson >
whitequark[cis]: would you mind sanity checking this when you have a moment please?
12:38
<
asjackson >
even though i do on real hardware
12:38
<
whitequark[cis] >
what do you see in the waveform viewer?
12:39
<
whitequark[cis] >
um, both ready signals are high?
12:40
<
asjackson >
oh yeah
12:40
<
asjackson >
so many lines
12:40
<
asjackson >
should ready always be high, that seems odd
12:42
<
whitequark[cis] >
ready is high at all times when you're not experiencing backpressure
12:42
<
whitequark[cis] >
practically speaking, since the simulated hardware doesn't have a way to limit buffer space, o_stream will be always ready (I think)
12:43
<
asjackson >
that makes sense
12:44
<
asjackson >
although it does not explain why `await self._pipe.recv(1)` isnt getting anything
13:05
<
asjackson >
i tried wiring the uart interface in a similar way , crossing rx/tx and i think see something similar
13:07
<
whitequark[cis] >
oh, that's a good testcase, thanks
13:08
<
whitequark[cis] >
I'll take a look later
13:10
<
asjackson >
no rush :) unless i am doing something silly i feel like multiple interface fifos have an issue in simulationassembly but i will take a break and maybe go to lidl haha
13:12
<
whitequark[cis] >
it's entirely possible they have an issue yeah
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